Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/cdns,qspi-nor-peripheral-props.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Peripheral-specific properties for the Cadence QSPI controller. description: See spi-peripheral-props.yaml for more info. maintainers: - Vaishnav Achath <vaishnav.a@ti.com> properties: # cdns,qspi-nor.yaml cdns,read-delay: $ref: /schemas/types.yaml#/definitions/uint32 description: Delay for read capture logic, in clock cycles. cdns,tshsl-ns: description: Delay in nanoseconds for the length that the master mode chip select outputs are de-asserted between transactions. cdns,tsd2d-ns: description: Delay in nanoseconds between one chip select being de-activated and the activation of another. cdns,tchsh-ns: description: Delay in nanoseconds between last bit of current transaction and deasserting the device chip select (qspi_n_ss_out). cdns,tslch-ns: description: Delay in nanoseconds between setting qspi_n_ss_out low and first bit transfer. additionalProperties: true |