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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/samsung,exynos-pcie-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Samsung SoC series PCIe PHY maintainers: - Marek Szyprowski <m.szyprowski@samsung.com> - Jaehoon Chung <jh80.chung@samsung.com> properties: "#phy-cells": const: 0 compatible: const: samsung,exynos5433-pcie-phy reg: maxItems: 1 samsung,pmu-syscon: $ref: /schemas/types.yaml#/definitions/phandle description: phandle for PMU system controller interface, used to control PMU registers bits for PCIe PHY samsung,fsys-sysreg: $ref: /schemas/types.yaml#/definitions/phandle description: phandle for FSYS sysreg interface, used to control sysreg registers bits for PCIe PHY required: - "#phy-cells" - compatible - reg - samsung,pmu-syscon - samsung,fsys-sysreg additionalProperties: false examples: - | pcie_phy: pcie-phy@15680000 { compatible = "samsung,exynos5433-pcie-phy"; reg = <0x15680000 0x1000>; samsung,pmu-syscon = <&pmu_system_controller>; samsung,fsys-sysreg = <&syscon_fsys>; #phy-cells = <0>; }; ... |