Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/qcom,msm8998-qmp-usb3-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm QMP PHY controller (USB, MSM8998) maintainers: - Vinod Koul <vkoul@kernel.org> description: The QMP PHY controller supports physical layer functionality for USB-C on several Qualcomm chipsets. properties: compatible: enum: - qcom,msm8998-qmp-usb3-phy - qcom,qcm2290-qmp-usb3-phy - qcom,sdm660-qmp-usb3-phy - qcom,sm6115-qmp-usb3-phy reg: maxItems: 1 clocks: maxItems: 4 clock-names: maxItems: 4 resets: maxItems: 2 reset-names: items: - const: phy - const: phy_phy vdda-phy-supply: true vdda-pll-supply: true "#clock-cells": const: 0 clock-output-names: maxItems: 1 "#phy-cells": const: 0 orientation-switch: description: Flag the PHY as possible handler of USB Type-C orientation switching type: boolean qcom,tcsr-reg: $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - description: phandle to TCSR hardware block - description: offset of the VLS CLAMP register description: Clamp register present in the TCSR ports: $ref: /schemas/graph.yaml#/properties/ports properties: port@0: $ref: /schemas/graph.yaml#/properties/port description: Output endpoint of the PHY port@1: $ref: /schemas/graph.yaml#/properties/port description: Incoming endpoint from the USB controller required: - compatible - reg - clocks - clock-names - resets - reset-names - vdda-phy-supply - vdda-pll-supply - "#clock-cells" - clock-output-names - "#phy-cells" - qcom,tcsr-reg allOf: - if: properties: compatible: contains: enum: - qcom,msm8998-qmp-usb3-phy - qcom,sdm660-qmp-usb3-phy then: properties: clocks: maxItems: 4 clock-names: items: - const: aux - const: ref - const: cfg_ahb - const: pipe - if: properties: compatible: contains: enum: - qcom,qcm2290-qmp-usb3-phy - qcom,sm6115-qmp-usb3-phy then: properties: clocks: maxItems: 4 clock-names: items: - const: cfg_ahb - const: ref - const: com_aux - const: pipe additionalProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-msm8998.h> #include <dt-bindings/clock/qcom,rpmh.h> phy@c010000 { compatible = "qcom,msm8998-qmp-usb3-phy"; reg = <0x0c010000 0x1000>; clocks = <&gcc GCC_USB3_PHY_AUX_CLK>, <&gcc GCC_USB3_CLKREF_CLK>, <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, <&gcc GCC_USB3_PHY_PIPE_CLK>; clock-names = "aux", "ref", "cfg_ahb", "pipe"; clock-output-names = "usb3_phy_pipe_clk_src"; #clock-cells = <0>; #phy-cells = <0>; resets = <&gcc GCC_USB3_PHY_BCR>, <&gcc GCC_USB3PHY_PHY_BCR>; reset-names = "phy", "phy_phy"; vdda-phy-supply = <&vreg_l1a_0p875>; vdda-pll-supply = <&vreg_l2a_1p2>; orientation-switch; qcom,tcsr-reg = <&tcsr_regs_1 0x6b244>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; endpoint { remote-endpoint = <&pmic_typec_mux_in>; }; }; port@1 { reg = <1>; endpoint { remote-endpoint = <&usb_dwc3_ss>; }; }; }; }; |