Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/qcom,usb-ss.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY maintainers: - Bryan O'Donoghue <bryan.odonoghue@linaro.org> description: | Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY properties: compatible: enum: - qcom,usb-ss-28nm-phy reg: maxItems: 1 "#phy-cells": const: 0 clocks: items: - description: rpmcc clock - description: PHY AHB clock - description: SuperSpeed pipe clock clock-names: items: - const: ref - const: ahb - const: pipe vdd-supply: description: phandle to the regulator VDD supply node. vdda1p8-supply: description: phandle to the regulator 1.8V supply node. resets: items: - description: COM reset - description: PHY reset line reset-names: items: - const: com - const: phy required: - compatible - reg - "#phy-cells" - clocks - clock-names - vdd-supply - vdda1p8-supply additionalProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-qcs404.h> #include <dt-bindings/clock/qcom,rpmcc.h> usb3_phy: usb3-phy@78000 { compatible = "qcom,usb-ss-28nm-phy"; reg = <0x78000 0x400>; #phy-cells = <0>; clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, <&gcc GCC_USB3_PHY_PIPE_CLK>; clock-names = "ref", "ahb", "pipe"; resets = <&gcc GCC_USB3_PHY_BCR>, <&gcc GCC_USB3PHY_PHY_BCR>; reset-names = "com", "phy"; vdd-supply = <&vreg_l3_1p05>; vdda1p8-supply = <&vreg_l5_1p8>; }; ... |