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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-hs.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm ipq806x usb DWC3 HS PHY CONTROLLER maintainers: - Ansuel Smith <ansuelsmth@gmail.com> description: DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer controllers used in ipq806x. Each DWC3 PHY controller should have its own node. properties: compatible: const: qcom,ipq806x-usb-phy-hs "#phy-cells": const: 0 reg: maxItems: 1 clocks: minItems: 1 maxItems: 2 clock-names: minItems: 1 items: - const: ref - const: xo required: - compatible - "#phy-cells" - reg - clocks - clock-names additionalProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-ipq806x.h> hs_phy_0: phy@110f8800 { compatible = "qcom,ipq806x-usb-phy-hs"; reg = <0x110f8800 0x30>; clocks = <&gcc USB30_0_UTMI_CLK>; clock-names = "ref"; #phy-cells = <0>; }; |