Based on kernel version 6.10
. Page generated on 2024-07-16 09:00 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale i.MX8MP HDMI PHY maintainers: - Lucas Stach <l.stach@pengutronix.de> properties: compatible: enum: - fsl,imx8mp-hdmi-phy reg: maxItems: 1 "#clock-cells": const: 0 clocks: maxItems: 2 clock-names: items: - const: apb - const: ref "#phy-cells": const: 0 power-domains: maxItems: 1 required: - compatible - reg - "#clock-cells" - clocks - clock-names - "#phy-cells" - power-domains additionalProperties: false examples: - | #include <dt-bindings/clock/imx8mp-clock.h> #include <dt-bindings/power/imx8mp-power.h> phy@32fdff00 { compatible = "fsl,imx8mp-hdmi-phy"; reg = <0x32fdff00 0x100>; clocks = <&clk IMX8MP_CLK_HDMI_APB>, <&clk IMX8MP_CLK_HDMI_24M>; clock-names = "apb", "ref"; power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; #clock-cells = <0>; #phy-cells = <0>; }; |