Based on kernel version 6.17
. Page generated on 2025-10-03 10:04 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/phy/marvell,berlin2-sata-phy.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Marvell Berlin SATA PHY maintainers: - Antoine Tenart <atenart@kernel.org> properties: compatible: enum: - marvell,berlin2-sata-phy - marvell,berlin2q-sata-phy reg: maxItems: 1 clocks: maxItems: 1 '#address-cells': const: 1 '#size-cells': const: 0 '#phy-cells': const: 1 patternProperties: '^sata-phy@[0-1]$': description: A SATA PHY sub-node. type: object additionalProperties: false properties: reg: maximum: 1 description: PHY index number. required: - reg required: - compatible - reg - clocks - '#address-cells' - '#size-cells' - '#phy-cells' additionalProperties: false examples: - | #include <dt-bindings/clock/berlin2q.h> phy@f7e900a0 { compatible = "marvell,berlin2q-sata-phy"; reg = <0xf7e900a0 0x200>; clocks = <&chip CLKID_SATA>; #address-cells = <1>; #size-cells = <0>; #phy-cells = <1>; sata-phy@0 { reg = <0>; }; sata-phy@1 { reg = <1>; }; }; |