Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: STMicroelectronics STi System Configuration Controlled IRQs maintainers: - Patrice Chotard <patrice.chotard@foss.st.com> description: On STi based systems; External, CTI (Core Sight), PMU (Performance Management), and PL310 L2 Cache IRQs are controlled using System Configuration registers. This device is used to unmask them prior to use. properties: compatible: const: st,stih407-irq-syscfg st,syscfg: description: Phandle to Cortex-A9 IRQ system config registers $ref: /schemas/types.yaml#/definitions/phandle st,irq-device: description: Array of IRQs to enable. $ref: /schemas/types.yaml#/definitions/uint32-array items: - description: Enable the IRQ of the channel one. - description: Enable the IRQ of the channel two. st,fiq-device: description: Array of FIQs to enable. $ref: /schemas/types.yaml#/definitions/uint32-array items: - description: Enable the IRQ of the channel one. - description: Enable the IRQ of the channel two. st,invert-ext: description: External IRQs can be inverted at will. This property inverts these three IRQs using bitwise logic, each one being encoded respectively on the first, second and fourth bit. $ref: /schemas/types.yaml#/definitions/uint32 enum: [ 1, 2, 3, 4, 5, 6 ] required: - compatible - st,syscfg - st,irq-device - st,fiq-device additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq-st.h> irq-syscfg { compatible = "st,stih407-irq-syscfg"; st,syscfg = <&syscfg_cpu>; st,irq-device = <ST_IRQ_SYSCFG_PMU_0>, <ST_IRQ_SYSCFG_PMU_1>; st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>, <ST_IRQ_SYSCFG_DISABLED>; }; ... |