Based on kernel version 6.13. Page generated on 2025-01-21 08:20 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/interrupt-controller/renesas,rzv2h-icu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Renesas RZ/V2H(P) Interrupt Control Unit maintainers: - Fabrizio Castro <fabrizio.castro.jz@renesas.com> - Geert Uytterhoeven <geert+renesas@glider.be> allOf: - $ref: /schemas/interrupt-controller.yaml# description: The Interrupt Control Unit (ICU) handles external interrupts (NMI, IRQ, and TINT), error interrupts, DMAC requests, GPT interrupts, and internal interrupts. properties: compatible: const: renesas,r9a09g057-icu # RZ/V2H(P) '#interrupt-cells': description: The first cell is the SPI number of the NMI or the PORT_IRQ[0-15] interrupt, as per user manual. The second cell is used to specify the flag. const: 2 '#address-cells': const: 0 interrupt-controller: true reg: maxItems: 1 interrupts: minItems: 58 items: - description: NMI interrupt - description: PORT_IRQ0 interrupt - description: PORT_IRQ1 interrupt - description: PORT_IRQ2 interrupt - description: PORT_IRQ3 interrupt - description: PORT_IRQ4 interrupt - description: PORT_IRQ5 interrupt - description: PORT_IRQ6 interrupt - description: PORT_IRQ7 interrupt - description: PORT_IRQ8 interrupt - description: PORT_IRQ9 interrupt - description: PORT_IRQ10 interrupt - description: PORT_IRQ11 interrupt - description: PORT_IRQ12 interrupt - description: PORT_IRQ13 interrupt - description: PORT_IRQ14 interrupt - description: PORT_IRQ15 interrupt - description: GPIO interrupt, TINT0 - description: GPIO interrupt, TINT1 - description: GPIO interrupt, TINT2 - description: GPIO interrupt, TINT3 - description: GPIO interrupt, TINT4 - description: GPIO interrupt, TINT5 - description: GPIO interrupt, TINT6 - description: GPIO interrupt, TINT7 - description: GPIO interrupt, TINT8 - description: GPIO interrupt, TINT9 - description: GPIO interrupt, TINT10 - description: GPIO interrupt, TINT11 - description: GPIO interrupt, TINT12 - description: GPIO interrupt, TINT13 - description: GPIO interrupt, TINT14 - description: GPIO interrupt, TINT15 - description: GPIO interrupt, TINT16 - description: GPIO interrupt, TINT17 - description: GPIO interrupt, TINT18 - description: GPIO interrupt, TINT19 - description: GPIO interrupt, TINT20 - description: GPIO interrupt, TINT21 - description: GPIO interrupt, TINT22 - description: GPIO interrupt, TINT23 - description: GPIO interrupt, TINT24 - description: GPIO interrupt, TINT25 - description: GPIO interrupt, TINT26 - description: GPIO interrupt, TINT27 - description: GPIO interrupt, TINT28 - description: GPIO interrupt, TINT29 - description: GPIO interrupt, TINT30 - description: GPIO interrupt, TINT31 - description: Software interrupt, INTA55_0 - description: Software interrupt, INTA55_1 - description: Software interrupt, INTA55_2 - description: Software interrupt, INTA55_3 - description: Error interrupt to CA55 - description: GTCCRA compare match/input capture (U0) - description: GTCCRB compare match/input capture (U0) - description: GTCCRA compare match/input capture (U1) - description: GTCCRB compare match/input capture (U1) interrupt-names: minItems: 58 items: - const: nmi - const: port_irq0 - const: port_irq1 - const: port_irq2 - const: port_irq3 - const: port_irq4 - const: port_irq5 - const: port_irq6 - const: port_irq7 - const: port_irq8 - const: port_irq9 - const: port_irq10 - const: port_irq11 - const: port_irq12 - const: port_irq13 - const: port_irq14 - const: port_irq15 - const: tint0 - const: tint1 - const: tint2 - const: tint3 - const: tint4 - const: tint5 - const: tint6 - const: tint7 - const: tint8 - const: tint9 - const: tint10 - const: tint11 - const: tint12 - const: tint13 - const: tint14 - const: tint15 - const: tint16 - const: tint17 - const: tint18 - const: tint19 - const: tint20 - const: tint21 - const: tint22 - const: tint23 - const: tint24 - const: tint25 - const: tint26 - const: tint27 - const: tint28 - const: tint29 - const: tint30 - const: tint31 - const: int-ca55-0 - const: int-ca55-1 - const: int-ca55-2 - const: int-ca55-3 - const: icu-error-ca55 - const: gpt-u0-gtciada - const: gpt-u0-gtciadb - const: gpt-u1-gtciada - const: gpt-u1-gtciadb clocks: maxItems: 1 power-domains: maxItems: 1 resets: maxItems: 1 required: - compatible - reg - '#interrupt-cells' - '#address-cells' - interrupt-controller - interrupts - interrupt-names - clocks - power-domains - resets unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/renesas-cpg-mssr.h> icu: interrupt-controller@10400000 { compatible = "renesas,r9a09g057-icu"; reg = <0x10400000 0x10000>; #interrupt-cells = <2>; #address-cells = <0>; interrupt-controller; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 262 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 263 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 265 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "nmi", "port_irq0", "port_irq1", "port_irq2", "port_irq3", "port_irq4", "port_irq5", "port_irq6", "port_irq7", "port_irq8", "port_irq9", "port_irq10", "port_irq11", "port_irq12", "port_irq13", "port_irq14", "port_irq15", "tint0", "tint1", "tint2", "tint3", "tint4", "tint5", "tint6", "tint7", "tint8", "tint9", "tint10", "tint11", "tint12", "tint13", "tint14", "tint15", "tint16", "tint17", "tint18", "tint19", "tint20", "tint21", "tint22", "tint23", "tint24", "tint25", "tint26", "tint27", "tint28", "tint29", "tint30", "tint31", "int-ca55-0", "int-ca55-1", "int-ca55-2", "int-ca55-3", "icu-error-ca55", "gpt-u0-gtciada", "gpt-u0-gtciadb", "gpt-u1-gtciada", "gpt-u1-gtciadb"; clocks = <&cpg CPG_MOD 0x5>; power-domains = <&cpg>; resets = <&cpg 0x36>; }; |