Documentation / devicetree / bindings / interrupt-controller / ti,cp-intc.yaml


Based on kernel version 6.16. Page generated on 2025-08-06 08:57 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/ti,cp-intc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI Common Platform Interrupt Controller

maintainers:
  - Bartosz Golaszewski <brgl@bgdev.pl>
  
description:
  Common Platform Interrupt Controller (cp_intc) is used on OMAP-L1x SoCs and
  can support several configurable number of interrupts.

properties:
  compatible:
    const: ti,cp-intc

  reg:
    maxItems: 1

  interrupt-controller: true
 
  '#interrupt-cells':
    const: 1
    description: Encodes an interrupt number in the range 0–128.

  ti,intc-size:
    description: Number of interrupts handled by the interrupt controller.
    $ref: /schemas/types.yaml#/definitions/uint32

required:
  - compatible
  - reg
  - interrupt-controller
  - '#interrupt-cells'
  - ti,intc-size

additionalProperties: false

examples:
  - |
    interrupt-controller@fffee000 {
        compatible = "ti,cp-intc";
        reg = <0xfffee000 0x2000>;
        interrupt-controller;
        #interrupt-cells = <1>;
        ti,intc-size = <101>;
    };