Based on kernel version 6.16
. Page generated on 2025-08-06 08:57 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/interrupt-controller/st,spear300-shirq.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: SPEAr3xx Shared IRQ controller maintainers: - Viresh Kumar <vireshk@kernel.org> - Shiraz Hashim <shiraz.linux.kernel@gmail.com> description: | SPEAr3xx architecture includes shared/multiplexed irqs for certain set of devices. The multiplexor provides a single interrupt to parent interrupt controller (VIC) on behalf of a group of devices. There can be multiple groups available on SPEAr3xx variants but not exceeding 4. The number of devices in a group can differ, further they may share same set of status/mask registers spanning across different bit masks. Also in some cases the group may not have enable or other registers. This makes software little complex. A single node in the device tree is used to describe the shared interrupt multiplexer (one node for all groups). A group in the interrupt controller shares config/control registers with other groups. For example, a 32-bit interrupt enable/disable config register can accommodate up to 4 interrupt groups. properties: compatible: enum: - st,spear300-shirq - st,spear310-shirq - st,spear320-shirq reg: maxItems: 1 '#interrupt-cells': const: 1 interrupt-controller: true interrupts: description: Interrupt specifier array for SHIRQ groups minItems: 1 maxItems: 4 required: - compatible - reg - '#interrupt-cells' - interrupt-controller - interrupts additionalProperties: false examples: - | interrupt-controller@b3000000 { compatible = "st,spear320-shirq"; reg = <0xb3000000 0x1000>; interrupts = <28 29 30 1>; #interrupt-cells = <1>; interrupt-controller; }; |