Documentation / devicetree / bindings / interrupt-controller / loongson,pch-pic.yaml


Based on kernel version 6.11. Page generated on 2024-09-24 08:21 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Loongson PCH PIC Controller

maintainers:
  - Jiaxun Yang <jiaxun.yang@flygoat.com>

description:
  This interrupt controller is found in the Loongson LS7A family of PCH for
  transforming interrupts from on-chip devices into HyperTransport vectorized
  interrupts.

properties:
  compatible:
    const: loongson,pch-pic-1.0

  reg:
    maxItems: 1

  loongson,pic-base-vec:
    description:
      u32 value of the base of parent HyperTransport vector allocated
      to PCH PIC.
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 192

  interrupt-controller: true
 
  '#interrupt-cells':
    const: 2

required:
  - compatible
  - reg
  - loongson,pic-base-vec
  - interrupt-controller
  - '#interrupt-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    pic: interrupt-controller@10000000 {
      compatible = "loongson,pch-pic-1.0";
      reg = <0x10000000 0x400>;
      interrupt-controller;
      #interrupt-cells = <2>;
      loongson,pic-base-vec = <64>;
      interrupt-parent = <&htvec>;
    };
...