Documentation / devicetree / bindings / interrupt-controller / loongson,pch-msi.yaml


Based on kernel version 6.11. Page generated on 2024-09-24 08:21 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Loongson PCH MSI Controller

maintainers:
  - Jiaxun Yang <jiaxun.yang@flygoat.com>

description:
  This interrupt controller is found in the Loongson LS7A family of PCH for
  transforming interrupts from PCIe MSI into HyperTransport vectorized
  interrupts.

properties:
  compatible:
    const: loongson,pch-msi-1.0

  reg:
    maxItems: 1

  loongson,msi-base-vec:
    description:
      u32 value of the base of parent HyperTransport vector allocated
      to PCH MSI.
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 0
    maximum: 255

  loongson,msi-num-vecs:
    description:
      u32 value of the number of parent HyperTransport vectors allocated
      to PCH MSI.
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 1
    maximum: 256

  msi-controller: true

required:
  - compatible
  - reg
  - msi-controller
  - loongson,msi-base-vec
  - loongson,msi-num-vecs

additionalProperties: true # fixme

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    msi: msi-controller@2ff00000 {
      compatible = "loongson,pch-msi-1.0";
      reg = <0x2ff00000 0x4>;
      msi-controller;
      loongson,msi-base-vec = <64>;
      loongson,msi-num-vecs = <64>;
      interrupt-parent = <&htvec>;
    };
...