Documentation / devicetree / bindings / interrupt-controller / nxp,lpc3220-mic.yaml


Based on kernel version 6.15. Page generated on 2025-05-29 09:08 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/nxp,lpc3220-mic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers

maintainers:
  - Vladimir Zapolskiy <vz@mleia.com>

properties:
  compatible:
    enum:
      - nxp,lpc3220-mic
      - nxp,lpc3220-sic

  reg:
    maxItems: 1

  interrupt-controller: true
 
  '#interrupt-cells':
    const: 2

  interrupts:
    items:
      - description: Regular interrupt request
      - description: Fast interrupt request

required:
  - compatible
  - reg
  - interrupt-controller
  - '#interrupt-cells'

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: nxp,lpc3220-sic
    then:
      required:
        - interrupts

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
 
    mic: interrupt-controller@40008000 {
        compatible = "nxp,lpc3220-mic";
        reg = <0x40008000 0x4000>;
        interrupt-controller;
        #interrupt-cells = <2>;
    };
 
    interrupt-controller@4000c000 {
        compatible = "nxp,lpc3220-sic";
        reg = <0x4000c000 0x4000>;
        interrupt-controller;
        #interrupt-cells = <2>;
        interrupt-parent = <&mic>;
        interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
                    <30 IRQ_TYPE_LEVEL_LOW>;
    };