Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 | # SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Marvell MMP/Orion Interrupt controller maintainers: - Andrew Lunn <andrew@lunn.ch> - Gregory Clement <gregory.clement@bootlin.com> allOf: - if: properties: compatible: not: contains: const: marvell,orion-intc then: required: - mrvl,intc-nr-irqs - if: properties: compatible: contains: enum: - mrvl,mmp-intc - mrvl,mmp2-intc then: properties: reg: maxItems: 1 - if: properties: compatible: contains: enum: - marvell,mmp3-intc - mrvl,mmp2-mux-intc then: properties: reg: minItems: 2 - if: properties: compatible: contains: const: mrvl,mmp2-mux-intc then: properties: interrupts: maxItems: 1 reg-names: items: - const: mux status - const: mux mask required: - interrupts else: properties: interrupts: false properties: '#interrupt-cells': const: 1 compatible: enum: - mrvl,mmp-intc - mrvl,mmp2-intc - marvell,mmp3-intc - marvell,orion-intc - mrvl,mmp2-mux-intc reg: minItems: 1 maxItems: 2 reg-names: true interrupts: true interrupt-controller: true mrvl,intc-nr-irqs: description: | Specifies the number of interrupts in the interrupt controller. $ref: /schemas/types.yaml#/definitions/uint32 mrvl,clr-mfp-irq: description: | Specifies the interrupt that needs to clear MFP edge detection first. $ref: /schemas/types.yaml#/definitions/uint32 required: - '#interrupt-cells' - compatible - reg - interrupt-controller additionalProperties: false examples: - | interrupt-controller@d4282000 { compatible = "mrvl,mmp2-intc"; interrupt-controller; #interrupt-cells = <1>; reg = <0xd4282000 0x1000>; mrvl,intc-nr-irqs = <64>; }; interrupt-controller@d4282150 { compatible = "mrvl,mmp2-mux-intc"; interrupts = <4>; interrupt-controller; #interrupt-cells = <1>; reg = <0x150 0x4>, <0x168 0x4>; reg-names = "mux status", "mux mask"; mrvl,intc-nr-irqs = <2>; }; - | interrupt-controller@fed20204 { compatible = "marvell,orion-intc"; interrupt-controller; #interrupt-cells = <1>; reg = <0xfed20204 0x04>, <0xfed20214 0x04>; }; ... |