# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI)

maintainers:
  - Hugues Fruchet <hugues.fruchet@foss.st.com>

properties:
  compatible:
    const: st,stm32-dcmi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: mclk

  dmas:
    minItems: 1
    maxItems: 2

  dma-names:
    items:
      - const: tx
      - const: mdma_tx
    minItems: 1

  resets:
    maxItems: 1

  access-controllers:
    minItems: 1
    maxItems: 2

  power-domains:
    maxItems: 1

  sram:
    maxItems: 1
    description:
      SRAM region which is used as temporary storage memory between DMA and
      MDMA engines.

  port:
    $ref: /schemas/graph.yaml#/$defs/port-base
    unevaluatedProperties: false
    description:
      DCMI supports a single port node with parallel bus.

    properties:
      endpoint:
        $ref: video-interfaces.yaml#
        unevaluatedProperties: false

        properties:
          bus-type:
            enum: [5, 6]
            default: 5

          bus-width:
            enum: [8, 10, 12, 14]
            default: 8

        allOf:
          - if:
              properties:
                bus-type:
                  const: 6

            then:
              properties:
                hsync-active: false
                vsync-active: false
                bus-width:
                  enum: [8]

        required:
          - bus-type
          - pclk-sample

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets
  - dmas
  - dma-names
  - port

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/stm32mp1-clks.h>
    #include <dt-bindings/media/video-interfaces.h>
    #include <dt-bindings/reset/stm32mp1-resets.h>
 
    dcmi: dcmi@4c006000 {
        compatible = "st,stm32-dcmi";
        reg = <0x4c006000 0x400>;
        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
        resets = <&rcc CAMITF_R>;
        clocks = <&rcc DCMI>;
        clock-names = "mclk";
        dmas = <&dmamux1 75 0x400 0x0d>;
        dma-names = "tx";
 
        port {
             dcmi_0: endpoint {
                   remote-endpoint = <&ov5640_0>;
                   bus-type = <MEDIA_BUS_TYPE_PARALLEL>;
                   bus-width = <8>;
                   hsync-active = <0>;
                   vsync-active = <0>;
                   pclk-sample = <1>;
             };
        };
    };

...