Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/media/qcom,msm8939-venus.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm MSM8939 Venus video encode and decode accelerators maintainers: - André Apitzsch <git@apitzsch.eu> - Erikas Bitovtas <xerikasxx@gmail.com> description: The Venus IP is a video encode and decode accelerator present on Qualcomm platforms allOf: - $ref: qcom,venus-common.yaml# properties: compatible: const: qcom,msm8939-venus power-domains: maxItems: 3 power-domain-names: items: - const: venus - const: vcodec0 - const: vcodec1 clocks: maxItems: 5 clock-names: items: - const: core - const: iface - const: bus - const: vcodec0_core - const: vcodec1_core iommus: maxItems: 1 required: - compatible - iommus - power-domain-names unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8939.h> video-codec@1d00000 { compatible = "qcom,msm8939-venus"; reg = <0x01d00000 0xff000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>, <&gcc GCC_VENUS0_AHB_CLK>, <&gcc GCC_VENUS0_AXI_CLK>, <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>, <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>; clock-names = "core", "iface", "bus", "vcodec0_core", "vcodec1_core"; power-domains = <&gcc VENUS_GDSC>, <&gcc VENUS_CORE0_GDSC>, <&gcc VENUS_CORE1_GDSC>; power-domain-names = "venus", "vcodec0", "vcodec1"; iommus = <&apps_iommu 5>; memory-region = <&venus_mem>; }; |