# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm SDM660 Venus video encode and decode accelerators

maintainers:
  - Stanimir Varbanov <stanimir.varbanov@linaro.org>
  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

description: |
  The Venus IP is a video encode and decode accelerator present
  on Qualcomm platforms

allOf:
  - $ref: qcom,venus-common.yaml#

properties:
  compatible:
    const: qcom,sdm660-venus

  clocks:
    maxItems: 4

  clock-names:
    items:
      - const: core
      - const: iface
      - const: bus
      - const: bus_throttle

  interconnects:
    maxItems: 2

  interconnect-names:
    items:
      - const: cpu-cfg
      - const: video-mem

  iommus:
    maxItems: 20

  power-domains:
    maxItems: 1

  video-decoder:
    type: object

    properties:
      compatible:
        const: venus-decoder

      clocks:
        maxItems: 1

      clock-names:
        items:
          - const: vcodec0_core

      power-domains:
        maxItems: 1

    required:
      - compatible
      - clocks
      - clock-names
      - power-domains

    additionalProperties: false

  video-encoder:
    type: object

    properties:
      compatible:
        const: venus-encoder

      clocks:
        maxItems: 1

      clock-names:
        items:
          - const: vcodec0_core

      power-domains:
        maxItems: 1

    required:
      - compatible
      - clocks
      - clock-names
      - power-domains

    additionalProperties: false

required:
  - compatible
  - iommus
  - video-decoder
  - video-encoder

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
 
    video-codec@cc00000 {
        compatible = "qcom,sdm660-venus";
        reg = <0x0cc00000 0xff000>;
        clocks = <&mmcc VIDEO_CORE_CLK>,
                 <&mmcc VIDEO_AHB_CLK>,
                 <&mmcc VIDEO_AXI_CLK>,
                 <&mmcc THROTTLE_VIDEO_AXI_CLK>;
        clock-names = "core", "iface", "bus", "bus_throttle";
        interconnects = <&gnoc 0 &mnoc 13>,
                        <&mnoc 4 &bimc 5>;
        interconnect-names = "cpu-cfg", "video-mem";
        interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
        iommus = <&mmss_smmu 0x400>,
                 <&mmss_smmu 0x401>,
                 <&mmss_smmu 0x40a>,
                 <&mmss_smmu 0x407>,
                 <&mmss_smmu 0x40e>,
                 <&mmss_smmu 0x40f>,
                 <&mmss_smmu 0x408>,
                 <&mmss_smmu 0x409>,
                 <&mmss_smmu 0x40b>,
                 <&mmss_smmu 0x40c>,
                 <&mmss_smmu 0x40d>,
                 <&mmss_smmu 0x410>,
                 <&mmss_smmu 0x421>,
                 <&mmss_smmu 0x428>,
                 <&mmss_smmu 0x429>,
                 <&mmss_smmu 0x42b>,
                 <&mmss_smmu 0x42c>,
                 <&mmss_smmu 0x42d>,
                 <&mmss_smmu 0x411>,
                 <&mmss_smmu 0x431>;
        memory-region = <&venus_region>;
        power-domains = <&mmcc VENUS_GDSC>;
 
        video-decoder {
            compatible = "venus-decoder";
            clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
            clock-names = "vcodec0_core";
            power-domains = <&mmcc VENUS_CORE0_GDSC>;
        };
 
        video-encoder {
            compatible = "venus-encoder";
            clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
            clock-names = "vcodec0_core";
            power-domains = <&mmcc VENUS_CORE0_GDSC>;
        };
    };