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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/media/nvidia,tegra-vde.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NVIDIA Tegra Video Decoder Engine maintainers: - Dmitry Osipenko <digetx@gmail.com> - Jon Hunter <jonathanh@nvidia.com> - Thierry Reding <thierry.reding@gmail.com> properties: compatible: oneOf: - items: - enum: - nvidia,tegra132-vde - nvidia,tegra124-vde - nvidia,tegra114-vde - items: - const: nvidia,tegra30-vde - const: nvidia,tegra20-vde - items: - const: nvidia,tegra20-vde reg: maxItems: 9 reg-names: items: - const: sxe - const: bsev - const: mbe - const: ppe - const: mce - const: tfe - const: ppb - const: vdma - const: frameid clocks: maxItems: 1 resets: maxItems: 2 reset-names: items: - const: vde - const: mc interrupts: maxItems: 3 interrupt-names: items: - const: sync-token - const: bsev - const: sxe iommus: maxItems: 1 iram: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle of the SRAM MMIO node. operating-points-v2: description: Should contain freqs and voltages and opp-supported-hw property, which is a bitfield indicating SoC speedo or process ID mask. power-domains: maxItems: 1 description: Phandle to the SoC core power domain. required: - compatible - reg - reg-names - clocks - resets - reset-names - interrupts - interrupt-names additionalProperties: false examples: - | video-codec@6001a000 { compatible = "nvidia,tegra20-vde"; reg = <0x6001a000 0x1000>, /* Syntax Engine */ <0x6001b000 0x1000>, /* Video Bitstream Engine */ <0x6001c000 0x100>, /* Macroblock Engine */ <0x6001c200 0x100>, /* Post-processing Engine */ <0x6001c400 0x100>, /* Motion Compensation Engine */ <0x6001c600 0x100>, /* Transform Engine */ <0x6001c800 0x100>, /* Pixel prediction block */ <0x6001ca00 0x100>, /* Video DMA */ <0x6001d800 0x300>; /* Video frame controls */ reg-names = "sxe", "bsev", "mbe", "ppe", "mce", "tfe", "ppb", "vdma", "frameid"; iram = <&iram>; /* IRAM MMIO region */ interrupts = <0 9 4>, /* Sync token */ <0 10 4>, /* BSE-V */ <0 12 4>; /* SXE */ interrupt-names = "sync-token", "bsev", "sxe"; clocks = <&clk 61>; reset-names = "vde", "mc"; resets = <&rst 61>, <&mem 13>; iommus = <&mem 15>; operating-points-v2 = <&dvfs_opp_table>; power-domains = <&domain>; }; |