Documentation / devicetree / bindings / media / mediatek,mt8173-vpu.yaml


Based on kernel version 6.18. Page generated on 2025-12-02 09:03 EST.

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/mediatek,mt8173-vpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek MT8173 Video Processor Unit

maintainers:
  - Ariel D'Alessandro <ariel.dalessandro@collabora.com>

description:
  Video Processor Unit is a HW video controller. It controls HW Codec including
  H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color
  convert).

properties:
  compatible:
    const: mediatek,mt8173-vpu

  reg:
    maxItems: 2

  reg-names:
    items:
      - const: tcm
      - const: cfg_reg

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: main

  memory-region:
    maxItems: 1

required:
  - compatible
  - reg
  - reg-names
  - interrupts
  - clocks
  - clock-names
  - memory-region

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/mt8173-clk.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
 
    soc {
        #address-cells = <2>;
        #size-cells = <2>;
 
        vpu: vpu@10020000 {
            compatible = "mediatek,mt8173-vpu";
            reg = <0 0x10020000 0 0x30000>,
                  <0 0x10050000 0 0x100>;
            reg-names = "tcm", "cfg_reg";
            interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&topckgen CLK_TOP_SCP_SEL>;
            clock-names = "main";
            memory-region = <&vpu_dma_reserved>;
        };
    };

...