Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 | # SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A10 Video Engine maintainers: - Chen-Yu Tsai <wens@csie.org> - Maxime Ripard <mripard@kernel.org> properties: compatible: enum: - allwinner,sun4i-a10-video-engine - allwinner,sun5i-a13-video-engine - allwinner,sun7i-a20-video-engine - allwinner,sun8i-a33-video-engine - allwinner,sun8i-h3-video-engine - allwinner,sun8i-v3s-video-engine - allwinner,sun8i-r40-video-engine - allwinner,sun20i-d1-video-engine - allwinner,sun50i-a64-video-engine - allwinner,sun50i-h5-video-engine - allwinner,sun50i-h6-video-engine reg: maxItems: 1 interrupts: maxItems: 1 clocks: items: - description: Bus Clock - description: Module Clock - description: RAM Clock clock-names: items: - const: ahb - const: mod - const: ram resets: maxItems: 1 allwinner,sram: $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - description: phandle to SRAM - description: register value for device description: Phandle to the device SRAM iommus: maxItems: 1 memory-region: maxItems: 1 description: CMA pool to use for buffers allocation instead of the default CMA pool. required: - compatible - reg - interrupts - clocks - clock-names - resets - allwinner,sram additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun7i-a20-ccu.h> #include <dt-bindings/reset/sun4i-a10-ccu.h> video-codec@1c0e000 { compatible = "allwinner,sun7i-a20-video-engine"; reg = <0x01c0e000 0x1000>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, <&ccu CLK_DRAM_VE>; clock-names = "ahb", "mod", "ram"; resets = <&ccu RST_VE>; allwinner,sram = <&ve_sram 1>; }; ... |