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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/media/mediatek,mdp3-stitch.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Media Data Path 3 STITCH maintainers: - Matthias Brugger <matthias.bgg@gmail.com> - Moudy Ho <moudy.ho@mediatek.com> description: One of Media Data Path 3 (MDP3) components used to combine multiple video frame with overlapping fields of view to produce a segmented panorame. properties: compatible: enum: - mediatek,mt8195-mdp3-stitch reg: maxItems: 1 mediatek,gce-client-reg: description: The register of display function block to be set by gce. There are 4 arguments, such as gce node, subsys id, offset and register size. The subsys id that is mapping to the register of display function blocks is defined in the gce header include/dt-bindings/gce/<chip>-gce.h of each chips. $ref: /schemas/types.yaml#/definitions/phandle-array items: items: - description: phandle of GCE - description: GCE subsys id - description: register offset - description: register size maxItems: 1 clocks: maxItems: 1 required: - compatible - reg - mediatek,gce-client-reg - clocks additionalProperties: false examples: - | #include <dt-bindings/clock/mt8195-clk.h> #include <dt-bindings/gce/mt8195-gce.h> display@14003000 { compatible = "mediatek,mt8195-mdp3-stitch"; reg = <0x14003000 0x1000>; mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>; clocks = <&vppsys0 CLK_VPP0_STITCH>; }; |