Based on kernel version 7.3. Page generated on 2026-10-19 13:17 EDT.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2023 Realtek Semiconductor Corporation %YAML 1.2 --- $id: http://devicetree.org/schemas/gpio/realtek,rtd1625-gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Realtek DHC RTD1625 GPIO controller maintainers: - Tzuyi Chang <tychang@realtek.com> description: | GPIO controller for the Realtek RTD1625 SoC, featuring a per-pin register architecture that differs significantly from earlier RTD series controllers. Each GPIO has dedicated registers for configuration (direction, input/output values, debounce), and interrupt control supporting edge and level detection modes. properties: compatible: enum: - realtek,rtd1625-iso-gpio - realtek,rtd1625-isom-gpio reg: maxItems: 1 interrupts: items: - description: Interrupt number of the assert GPIO interrupt, which is triggered when there is a rising edge. - description: Interrupt number of the deassert GPIO interrupt, which is triggered when there is a falling edge. - description: Interrupt number of the level-sensitive GPIO interrupt, triggered by a configured logic level. interrupt-controller: true "#interrupt-cells": const: 2 gpio-ranges: true gpio-controller: true "#gpio-cells": const: 2 required: - compatible - reg - gpio-ranges - gpio-controller - "#gpio-cells" additionalProperties: false examples: - | gpio@89100 { compatible = "realtek,rtd1625-isom-gpio"; reg = <0x89100 0x30>; interrupt-parent = <&iso_m_irq_mux>; interrupts = <0>, <1>, <2>; interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&isom_pinctrl 0 0 4>; gpio-controller; #gpio-cells = <2>; }; |