Based on kernel version 6.17
. Page generated on 2025-10-03 10:04 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/gpio/cdns,gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Cadence GPIO Controller maintainers: - Jan Kotas <jank@cadence.com> properties: compatible: oneOf: - const: cdns,gpio-r1p02 - items: - enum: - axiado,ax3000-gpio - const: cdns,gpio-r1p02 reg: maxItems: 1 clocks: maxItems: 1 ngpios: minimum: 1 maximum: 32 gpio-controller: true "#gpio-cells": const: 2 description: | - First cell is the GPIO line number. - Second cell is flags as defined in <dt-bindings/gpio/gpio.h>, only GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW supported. interrupt-controller: true "#interrupt-cells": const: 2 description: | - First cell is the GPIO line number used as IRQ. - Second cell is the trigger type, as defined in <dt-bindings/interrupt-controller/irq.h>. interrupts: maxItems: 1 required: - compatible - reg - clocks - gpio-controller - "#gpio-cells" if: required: [interrupt-controller] then: required: - interrupts additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> gpio0: gpio-controller@fd060000 { compatible = "cdns,gpio-r1p02"; reg = <0xfd060000 0x1000>; clocks = <&gpio_clk>; interrupt-parent = <&gic>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; |