Based on kernel version 6.17
. Page generated on 2025-10-03 10:04 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/gpio/nxp,lpc1850-gpio.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP LPC18xx/43xx GPIO controller maintainers: - Frank Li <Frank.Li@nxp.com> properties: compatible: const: nxp,lpc1850-gpio reg: minItems: 1 maxItems: 4 reg-names: minItems: 1 items: - const: gpio - const: gpio-pin-ic - const: gpio-group0-ic - const: gpio-gpoup1-ic clocks: maxItems: 1 resets: maxItems: 1 gpio-controller: true '#gpio-cells': const: 2 interrupt-controller: true '#interrupt-cells': const: 2 description: | - The first cell is an interrupt number within 0..9 range, for GPIO pin interrupts it is equal to 'nxp,gpio-pin-interrupt' property value of GPIO pin configuration, 8 is for GPIO GROUP0 interrupt, 9 is for GPIO GROUP1 interrupt - The second cell is used to specify interrupt type gpio-ranges: true required: - compatible - reg - clocks - gpio-controller - '#gpio-cells' additionalProperties: false examples: - | #include <dt-bindings/clock/lpc18xx-ccu.h> gpio@400f4000 { compatible = "nxp,lpc1850-gpio"; reg = <0x400f4000 0x4000>, <0x40087000 0x1000>, <0x40088000 0x1000>, <0x40089000 0x1000>; reg-names = "gpio", "gpio-pin-ic", "gpio-group0-ic", "gpio-gpoup1-ic"; clocks = <&ccu1 CLK_CPU_GPIO>; resets = <&rgu 28>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; |