Based on kernel version 6.8
. Page generated on 2024-03-11 21:26 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 | Qualcomm's APQ8016/MSM8916 USB transceiver controller - compatible: Usage: required Value type: <string> Definition: Should contain "qcom,usb-8x16-phy". - reg: Usage: required Value type: <prop-encoded-array> Definition: USB PHY base address and length of the register map - clocks: Usage: required Value type: <prop-encoded-array> Definition: See clock-bindings.txt section "consumers". List of two clock specifiers for interface and core controller clocks. - clock-names: Usage: required Value type: <string> Definition: Must contain "iface" and "core" strings. - vddcx-supply: Usage: required Value type: <phandle> Definition: phandle to the regulator VDCCX supply node. - v1p8-supply: Usage: required Value type: <phandle> Definition: phandle to the regulator 1.8V supply node. - v3p3-supply: Usage: required Value type: <phandle> Definition: phandle to the regulator 3.3V supply node. - resets: Usage: required Value type: <prop-encoded-array> Definition: See reset.txt section "consumers". PHY reset specifier. - reset-names: Usage: required Value type: <string> Definition: Must contain "phy" string. - switch-gpio: Usage: optional Value type: <prop-encoded-array> Definition: Some boards are using Dual SPDT USB Switch, witch is controlled by GPIO to de/multiplex D+/D- USB lines between connectors. Example: usb_phy: phy@78d9000 { compatible = "qcom,usb-8x16-phy"; reg = <0x78d9000 0x400>; vddcx-supply = <&pm8916_s1_corner>; v1p8-supply = <&pm8916_l7>; v3p3-supply = <&pm8916_l13>; clocks = <&gcc GCC_USB_HS_AHB_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>; clock-names = "iface", "core"; resets = <&gcc GCC_USB2A_PHY_BCR>; reset-names = "phy"; // D+/D- lines: 1 - Routed to HUB, 0 - Device connector switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>; }; |