Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright 2022 Unisoc Inc. %YAML 1.2 --- $id: http://devicetree.org/schemas/mfd/sprd,ums512-glbreg.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Unisoc System Global Register maintainers: - Orson Zhai <orsonzhai@gmail.com> - Baolin Wang <baolin.wang7@gmail.com> - Chunyan Zhang <zhang.lyra@gmail.com> description: Unisoc system global registers provide register map for clocks and some multimedia modules of the SoC. properties: compatible: items: - enum: - sprd,ums512-glbregs - sprd,ums9620-glbregs - const: syscon - const: simple-mfd "#address-cells": const: 1 "#size-cells": const: 1 ranges: maxItems: 1 reg: maxItems: 1 patternProperties: "^clock-controller@[0-9a-f]+$": type: object $ref: /schemas/clock/sprd,ums512-clk.yaml# description: Clock controller for the SoC clocks. required: - compatible - reg additionalProperties: false examples: - | ap_apb_regs: syscon@71000000 { compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd"; reg = <0x71000000 0x3000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x71000000 0x3000>; clock-controller@0 { compatible = "sprd,ums512-apahb-gate"; reg = <0x0 0x2000>; #clock-cells = <1>; }; }; - | ap_intc5_regs: syscon@32360000 { compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd"; reg = <0x32360000 0x1000>; }; |