Documentation / devicetree / bindings / net / nuvoton,ma35d1-dwmac.yaml


Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/nuvoton,ma35d1-dwmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Nuvoton DWMAC glue layer controller

maintainers:
  - Joey Lu <yclu4@nuvoton.com>

description:
  Nuvoton 10/100/1000Mbps Gigabit Ethernet MAC Controller is based on
  Synopsys DesignWare MAC (version 3.73a).

select:
  properties:
    compatible:
      contains:
        enum:
          - nuvoton,ma35d1-dwmac
  required:
    - compatible

allOf:
  - $ref: snps,dwmac.yaml#

properties:
  compatible:
    items:
      - const: nuvoton,ma35d1-dwmac
      - const: snps,dwmac-3.70a

  reg:
    maxItems: 1
    description:
      Register range should be one of the GMAC interface.

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: MAC clock
      - description: PTP clock

  clock-names:
    items:
      - const: stmmaceth
      - const: ptp_ref

  nuvoton,sys:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      - items:
          - description: phandle to access syscon registers.
          - description: GMAC interface ID.
            enum:
              - 0
              - 1
    description:
      A phandle to the syscon with one argument that configures system registers
      for MA35D1's two GMACs. The argument specifies the GMAC interface ID.

  resets:
    maxItems: 1

  reset-names:
    items:
      - const: stmmaceth

  phy-mode:
    enum:
      - rmii
      - rgmii
      - rgmii-id
      - rgmii-txid
      - rgmii-rxid

  tx-internal-delay-ps:
    default: 0
    minimum: 0
    maximum: 2000
    description:
      RGMII TX path delay used only when PHY operates in RGMII mode with
      internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
      Allowed values are from 0 to 2000.

  rx-internal-delay-ps:
    default: 0
    minimum: 0
    maximum: 2000
    description:
      RGMII RX path delay used only when PHY operates in RGMII mode with
      internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
      Allowed values are from 0 to 2000.

required:
  - clocks
  - clock-names
  - nuvoton,sys
  - resets
  - reset-names
  - phy-mode

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
    #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
    ethernet@40120000 {
        compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a";
        reg = <0x40120000 0x10000>;
        interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-names = "macirq";
        clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>;
        clock-names = "stmmaceth", "ptp_ref";
 
        nuvoton,sys = <&sys 0>;
        resets = <&sys MA35D1_RESET_GMAC0>;
        reset-names = "stmmaceth";
        snps,multicast-filter-bins = <0>;
        snps,perfect-filter-entries = <8>;
        rx-fifo-depth = <4096>;
        tx-fifo-depth = <2048>;
 
        phy-mode = "rgmii-id";
        phy-handle = <&eth_phy0>;
        mdio {
            compatible = "snps,dwmac-mdio";
            #address-cells = <1>;
            #size-cells = <0>;
 
            eth_phy0: ethernet-phy@0 {
                reg = <0>;
            };
        };
    };