Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/net/ingenic,mac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MAC in Ingenic SoCs maintainers: - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> description: The Ethernet Media Access Controller in Ingenic SoCs. properties: compatible: enum: - ingenic,jz4775-mac - ingenic,x1000-mac - ingenic,x1600-mac - ingenic,x1830-mac - ingenic,x2000-mac reg: maxItems: 1 interrupts: maxItems: 1 interrupt-names: const: macirq clocks: maxItems: 1 clock-names: const: stmmaceth mode-reg: $ref: /schemas/types.yaml#/definitions/phandle description: An extra syscon register that control ethernet interface and timing delay rx-clk-delay-ps: description: RGMII receive clock delay defined in pico seconds tx-clk-delay-ps: description: RGMII transmit clock delay defined in pico seconds required: - compatible - reg - interrupts - interrupt-names - clocks - clock-names - mode-reg additionalProperties: false examples: - | #include <dt-bindings/clock/ingenic,x1000-cgu.h> mac: ethernet@134b0000 { compatible = "ingenic,x1000-mac"; reg = <0x134b0000 0x2000>; interrupt-parent = <&intc>; interrupts = <55>; interrupt-names = "macirq"; clocks = <&cgu X1000_CLK_MAC>; clock-names = "stmmaceth"; mode-reg = <&mac_phy_ctrl>; }; ... |