Based on kernel version 6.10
. Page generated on 2024-07-16 09:00 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/net/qcom,qca807x.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm QCA807x Ethernet PHY maintainers: - Christian Marangi <ansuelsmth@gmail.com> - Robert Marko <robert.marko@sartura.hr> description: | Qualcomm QCA8072/5 Ethernet PHY is PHY package of 2 or 5 IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s. They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC, while second one is SGMII for connection to MAC or fiber. Both models have a combo port that supports 1000BASE-X and 100BASE-FX fiber. Each PHY inside of QCA807x series has 4 digitally controlled output only pins that natively drive LED-s for up to 2 attached LEDs. Some vendor also use these 4 output for GPIO usage without attaching LEDs. Note that output pins can be set to drive LEDs OR GPIO, mixed definition are not accepted. $ref: ethernet-phy-package.yaml# properties: compatible: enum: - qcom,qca8072-package - qcom,qca8075-package qcom,package-mode: description: | PHY package can be configured in 3 mode following this table: First Serdes mode Second Serdes mode Option 1 PSGMII for copper Disabled ports 0-4 Option 2 PSGMII for copper 1000BASE-X / 100BASE-FX ports 0-4 Option 3 QSGMII for copper SGMII for ports 0-3 copper port 4 PSGMII mode (option 1 or 2) is configured dynamically based on the presence of a connected SFP device. $ref: /schemas/types.yaml#/definitions/string enum: - qsgmii - psgmii default: psgmii qcom,tx-drive-strength-milliwatt: description: set the TX Amplifier value in mv. $ref: /schemas/types.yaml#/definitions/uint32 enum: [140, 160, 180, 200, 220, 240, 260, 280, 300, 320, 400, 500, 600] default: 600 patternProperties: ^ethernet-phy@[a-f0-9]+$: $ref: ethernet-phy.yaml# properties: qcom,dac-full-amplitude: description: Set Analog MDI driver amplitude to FULL. With this not defined, amplitude is set to DSP. (amplitude is adjusted based on cable length) With this enabled and qcom,dac-full-bias-current and qcom,dac-disable-bias-current-tweak disabled, bias current is half. type: boolean qcom,dac-full-bias-current: description: Set Analog MDI driver bias current to FULL. With this not defined, bias current is set to DSP. (bias current is adjusted based on cable length) Actual bias current might be different with qcom,dac-disable-bias-current-tweak disabled. type: boolean qcom,dac-disable-bias-current-tweak: description: | Set Analog MDI driver bias current to disable tweak to bias current. With this not defined, bias current tweak are enabled by default. With this enabled the following tweak are NOT applied: - With both FULL amplitude and FULL bias current: bias current is set to half. - With only DSP amplitude: bias current is set to half and is set to 1/4 with cable < 10m. - With DSP bias current (included both DSP amplitude and DSP bias current): bias current is half the detected current with cable < 10m. type: boolean gpio-controller: true '#gpio-cells': const: 2 if: required: - gpio-controller then: properties: leds: false unevaluatedProperties: false required: - compatible unevaluatedProperties: false examples: - | #include <dt-bindings/leds/common.h> mdio { #address-cells = <1>; #size-cells = <0>; ethernet-phy-package@0 { #address-cells = <1>; #size-cells = <0>; compatible = "qcom,qca8075-package"; reg = <0>; qcom,package-mode = "qsgmii"; ethernet-phy@0 { reg = <0>; leds { #address-cells = <1>; #size-cells = <0>; led@0 { reg = <0>; color = <LED_COLOR_ID_GREEN>; function = LED_FUNCTION_LAN; default-state = "keep"; }; }; }; ethernet-phy@1 { reg = <1>; }; ethernet-phy@2 { reg = <2>; gpio-controller; #gpio-cells = <2>; }; ethernet-phy@3 { reg = <3>; }; ethernet-phy@4 { reg = <4>; }; }; }; |