Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/usb/starfive,jhb100-dwc3.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: StarFive JHB100 DWC3 USB SoC Controller maintainers: - Minda Chen <minda.chen@starfivetech.com> description: The USB DRD controller on JHB100 BMC SoC. allOf: - $ref: snps,dwc3-common.yaml# properties: compatible: const: starfive,jhb100-dwc3 reg: maxItems: 1 interrupts: maxItems: 1 clocks: items: - description: USB main enable clk - description: DWC3 bus early clock - description: DWC3 ref clock clock-names: items: - const: main - const: bus_early - const: ref resets: maxItems: 1 required: - compatible - reg - clocks - clock-names - interrupts unevaluatedProperties: false examples: - | usb@11800000 { compatible = "starfive,jhb100-dwc3"; reg = <0x11800000 0x10000>; clocks = <&usbcrg 9>, <&usbcrg 5>, <&usbcrg 6>; clock-names = "main", "bus_early", "ref"; resets = <&usbcrg 4>; interrupts = <105>; dr_mode = "host"; }; |