Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright 2026 NXP %YAML 1.2 --- $id: http://devicetree.org/schemas/usb/nxp,imx-dwc3.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: NXP i.MX Soc USB Controller maintainers: - Xu Yang <xu.yang_2@nxp.com> properties: compatible: oneOf: - items: - enum: - nxp,imx94-dwc3 - nxp,imx95-dwc3 - const: nxp,imx8mp-dwc3 - const: nxp,imx8mp-dwc3 reg: items: - description: DWC3 core registers - description: HSIO Block Control registers - description: Wrapper registers of dwc3 core reg-names: items: - const: core - const: blkctl - const: glue interrupts: items: - description: DWC3 controller interrupt - description: Wakeup interrupt from glue logic interrupt-names: items: - const: dwc_usb3 - const: wakeup iommus: maxItems: 1 clocks: items: - description: System hsio root clock - description: SoC Bus Clock for AHB/AXI/Native - description: Reference clock for generating ITP when UTMI/ULPI PHY is suspended - description: Suspend clock used for usb wakeup logic clock-names: items: - const: hsio - const: bus_early - const: ref - const: suspend fsl,permanently-attached: type: boolean description: Indicates if the device attached to a downstream port is permanently attached fsl,disable-port-power-control: type: boolean description: Indicates whether the host controller implementation includes port power control. Defines Bit 3 in capability register (HCCPARAMS) fsl,over-current-active-low: type: boolean description: Over current signal polarity is active low fsl,power-active-low: type: boolean description: Power pad (PWR) polarity is active low power-domains: maxItems: 1 required: - compatible - reg - clocks - clock-names - interrupts - power-domains allOf: - $ref: snps,dwc3-common.yaml# unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> usb@4c100000 { compatible = "nxp,imx94-dwc3", "nxp,imx8mp-dwc3"; reg = <0x4c100000 0x10000>, <0x4c010010 0x04>, <0x4c1f0000 0x20>; reg-names = "core", "blkctl", "glue"; clocks = <&scmi_clk 74>, //IMX94_CLK_HSIO <&scmi_clk 74>, //IMX94_CLK_HSIO <&scmi_clk 2>, //IMX94_CLK_24M <&scmi_clk 1>; //IMX94_CLK_32K clock-names = "hsio", "bus_early", "ref", "suspend"; interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "dwc_usb3", "wakeup"; power-domains = <&scmi_devpd 13>; //IMX94_PD_HSIO_TOP phys = <&usb3_phy>, <&usb3_phy>; phy-names = "usb2-phy", "usb3-phy"; snps,gfladj-refclk-lpm-sel-quirk; snps,parkmode-disable-ss-quirk; }; |