Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/usb/onnn,nb7vpq904m.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ON Semiconductor Type-C DisplayPort ALT Mode Linear Redriver maintainers: - Neil Armstrong <neil.armstrong@linaro.org> properties: compatible: enum: - onnn,nb7vpq904m reg: maxItems: 1 vcc-supply: description: power supply (1.8V) enable-gpios: true orientation-switch: true retimer-switch: true ports: $ref: /schemas/graph.yaml#/properties/ports properties: port@0: $ref: /schemas/graph.yaml#/properties/port description: Super Speed (SS) Output endpoint to the Type-C connector port@1: $ref: /schemas/graph.yaml#/$defs/port-base description: Super Speed (SS) Input endpoint from the Super-Speed PHY unevaluatedProperties: false properties: endpoint: $ref: /schemas/graph.yaml#/$defs/endpoint-base unevaluatedProperties: false properties: data-lanes: $ref: /schemas/types.yaml#/definitions/uint32-array description: | An array of physical data lane indexes. Position determines how lanes are connected to the redriver, It is assumed the same order is kept on the other side of the redriver. Lane number represents the following - 0 is RX2 lane - 1 is TX2 lane - 2 is TX1 lane - 3 is RX1 lane The position determines the physical port of the redriver, in the order A, B, C & D. oneOf: - items: - const: 0 - const: 1 - const: 2 - const: 3 description: | This is the lanes default layout - Port A to RX2 lane - Port B to TX2 lane - Port C to TX1 lane - Port D to RX1 lane - items: - const: 3 - const: 2 - const: 1 - const: 0 description: | This is the USBRX2/USBTX2 and USBRX1/USBTX1 swapped lanes layout - Port A to RX1 lane - Port B to TX1 lane - Port C to TX2 lane - Port D to RX2 lane port@2: $ref: /schemas/graph.yaml#/properties/port description: Sideband Use (SBU) AUX lines endpoint to the Type-C connector for the purpose of handling altmode muxing and orientation switching. required: - compatible - reg allOf: - $ref: usb-switch.yaml# additionalProperties: false examples: - | i2c { #address-cells = <1>; #size-cells = <0>; typec-mux@32 { compatible = "onnn,nb7vpq904m"; reg = <0x32>; vcc-supply = <&vreg_l15b_1p8>; retimer-switch; orientation-switch; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; usb_con_ss: endpoint { remote-endpoint = <&typec_con_ss>; }; }; port@1 { reg = <1>; phy_con_ss: endpoint { remote-endpoint = <&usb_phy_ss>; data-lanes = <3 2 1 0>; }; }; port@2 { reg = <2>; usb_con_sbu: endpoint { remote-endpoint = <&typec_dp_aux>; }; }; }; }; }; ... |