Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mmc/hisilicon,hi3660-dw-mshc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Hisilicon specific extensions to the Synopsys Designware Mobile Storage Host Controller maintainers: - Zhangfei Gao <zhangfei.gao@linaro.org> description: The Synopsys designware mobile storage host controller is used to interface a SoC with storage medium such as eMMC or SD/MMC cards. This file documents differences between the core Synopsys dw mshc controller properties described by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific extensions to the Synopsys Designware Mobile Storage Host Controller. allOf: - $ref: /schemas/mmc/synopsys-dw-mshc-common.yaml# properties: compatible: oneOf: - enum: - hisilicon,hi3660-dw-mshc - hisilicon,hi4511-dw-mshc - hisilicon,hi6220-dw-mshc - items: - const: hisilicon,hi3670-dw-mshc - const: hisilicon,hi3660-dw-mshc reg: maxItems: 1 interrupts: maxItems: 1 clocks: items: - description: card interface unit clock - description: bus interface unit clock clock-names: items: - const: ciu - const: biu hisilicon,peripheral-syscon: $ref: /schemas/types.yaml#/definitions/phandle description: phandle of syscon used to control peripheral. required: - compatible - reg - interrupts - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/clock/hi3620-clock.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> mmc@fcd03000 { compatible = "hisilicon,hi4511-dw-mshc"; reg = <0xfcd03000 0x1000>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&mmc_clock HI3620_SD_CIUCLK>, <&clock HI3620_DDRC_PER_CLK>; clock-names = "ciu", "biu"; vmmc-supply = <&ldo12>; fifo-depth = <0x100>; pinctrl-names = "default"; pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; bus-width = <4>; disable-wp; cd-gpios = <&gpio10 3 GPIO_ACTIVE_HIGH>; cap-mmc-highspeed; cap-sd-highspeed; }; - | #include <dt-bindings/clock/hi6220-clock.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> soc { #address-cells = <2>; #size-cells = <2>; mmc@f723e000 { compatible = "hisilicon,hi6220-dw-mshc"; reg = <0x0 0xf723e000 0x0 0x1000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; clock-names = "ciu", "biu"; bus-width = <4>; disable-wp; cap-sd-highspeed; sd-uhs-sdr12; sd-uhs-sdr25; card-detect-delay = <200>; hisilicon,peripheral-syscon = <&ao_ctrl>; cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "idle"; pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; vqmmc-supply = <&ldo7>; vmmc-supply = <&ldo10>; }; }; |