Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 | # SPDX-License-Identifier: GPL-2.0-or-later # Copyright 2019 IBM Corp. %YAML 1.2 --- $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ASPEED SD/SDIO/MMC Controller maintainers: - Andrew Jeffery <andrew@aj.id.au> - Ryan Chen <ryanchen.aspeed@gmail.com> description: |+ The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if only a single slot is enabled. The two slots are supported by a common configuration area. As the SDHCIs for the slots are dependent on the common configuration area, they are described as child nodes. properties: compatible: enum: - aspeed,ast2400-sd-controller - aspeed,ast2500-sd-controller - aspeed,ast2600-sd-controller reg: maxItems: 1 description: Common configuration registers "#address-cells": const: 1 "#size-cells": const: 1 ranges: true clocks: maxItems: 1 description: The SD/SDIO controller clock gate patternProperties: "^sdhci@[0-9a-f]+$": type: object $ref: mmc-controller.yaml unevaluatedProperties: false properties: compatible: enum: - aspeed,ast2400-sdhci - aspeed,ast2500-sdhci - aspeed,ast2600-sdhci reg: maxItems: 1 description: The SDHCI registers clocks: maxItems: 1 description: The SD bus clock interrupts: maxItems: 1 description: The SD interrupt shared between both slots sdhci,auto-cmd12: type: boolean description: Specifies that controller should use auto CMD12 required: - compatible - reg - clocks - interrupts additionalProperties: false required: - compatible - reg - "#address-cells" - "#size-cells" - ranges - clocks examples: - | #include <dt-bindings/clock/aspeed-clock.h> sdc@1e740000 { compatible = "aspeed,ast2500-sd-controller"; reg = <0x1e740000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x1e740000 0x20000>; clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; sdhci0: sdhci@100 { compatible = "aspeed,ast2500-sdhci"; reg = <0x100 0x100>; interrupts = <26>; sdhci,auto-cmd12; clocks = <&syscon ASPEED_CLK_SDIO>; }; sdhci1: sdhci@200 { compatible = "aspeed,ast2500-sdhci"; reg = <0x200 0x100>; interrupts = <26>; sdhci,auto-cmd12; clocks = <&syscon ASPEED_CLK_SDIO>; }; }; |