Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MMC Controller Common Properties maintainers: - Ulf Hansson <ulf.hansson@linaro.org> description: | These properties are common to multiple MMC host controllers. Any host that requires the respective functionality should implement them using these definitions. It is possible to assign a fixed index mmcN to an MMC host controller (and the corresponding mmcblkN devices) by defining an alias in the /aliases device tree node. properties: $nodename: pattern: "^mmc(@.*)?$" "#address-cells": const: 1 description: | The cell is the slot ID if a function subnode is used. "#size-cells": const: 0 # Card Detection. # If none of these properties are supplied, the host native card # detect will be used. Only one of them should be provided. broken-cd: $ref: /schemas/types.yaml#/definitions/flag description: There is no card detection available; polling must be used. cd-gpios: maxItems: 1 description: The card detection will be done using the GPIO provided. non-removable: $ref: /schemas/types.yaml#/definitions/flag description: Non-removable slot (like eMMC); assume always present. # *NOTE* on CD and WP polarity. To use common for all SD/MMC host # controllers line polarity properties, we have to fix the meaning # of the "normal" and "inverted" line levels. We choose to follow # the SDHCI standard, which specifies both those lines as "active # low." Therefore, using the "cd-inverted" property means, that the # CD line is active high, i.e. it is high, when a card is # inserted. Similar logic applies to the "wp-inverted" property. # # CD and WP lines can be implemented on the hardware in one of two # ways: as GPIOs, specified in cd-gpios and wp-gpios properties, or # as dedicated pins. Polarity of dedicated pins can be specified, # using *-inverted properties. GPIO polarity can also be specified # using the GPIO_ACTIVE_LOW flag. This creates an ambiguity in the # latter case. We choose to use the XOR logic for GPIO CD and WP # lines. This means, the two properties are "superimposed," for # example leaving the GPIO_ACTIVE_LOW flag clear and specifying the # respective *-inverted property property results in a # double-inversion and actually means the "normal" line polarity is # in effect. wp-inverted: $ref: /schemas/types.yaml#/definitions/flag description: The Write Protect line polarity is inverted. cd-inverted: $ref: /schemas/types.yaml#/definitions/flag description: The CD line polarity is inverted. # Other properties bus-width: description: Number of data lines. $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 4, 8] default: 1 max-frequency: description: | Maximum operating frequency of the bus: - for eMMC, the maximum supported frequency is 200MHz, - for SD/SDIO cards the SDR104 mode has a max supported frequency of 208MHz, - some mmc host controllers do support a max frequency upto 384MHz. So, lets keep the maximum supported value here. $ref: /schemas/types.yaml#/definitions/uint32 minimum: 400000 maximum: 384000000 disable-wp: $ref: /schemas/types.yaml#/definitions/flag description: When set, no physical write-protect line is present. This property should only be specified when the controller has a dedicated write-protect detection logic. If a GPIO is always used for the write-protect detection logic, it is sufficient to not specify the wp-gpios property in the absence of a write-protect line. Not used in combination with eMMC or SDIO. wp-gpios: maxItems: 1 description: GPIO to use for the write-protect detection. cd-debounce-delay-ms: description: Set delay time before detecting card after card insert interrupt. no-1-8-v: $ref: /schemas/types.yaml#/definitions/flag description: When specified, denotes that 1.8V card voltage is not supported on this system, even if the controller claims it. cap-sd-highspeed: $ref: /schemas/types.yaml#/definitions/flag description: SD high-speed timing is supported. cap-mmc-highspeed: $ref: /schemas/types.yaml#/definitions/flag description: MMC high-speed timing is supported. sd-uhs-sdr12: $ref: /schemas/types.yaml#/definitions/flag description: SD UHS SDR12 speed is supported. sd-uhs-sdr25: $ref: /schemas/types.yaml#/definitions/flag description: SD UHS SDR25 speed is supported. sd-uhs-sdr50: $ref: /schemas/types.yaml#/definitions/flag description: SD UHS SDR50 speed is supported. sd-uhs-sdr104: $ref: /schemas/types.yaml#/definitions/flag description: SD UHS SDR104 speed is supported. sd-uhs-ddr50: $ref: /schemas/types.yaml#/definitions/flag description: SD UHS DDR50 speed is supported. cap-power-off-card: $ref: /schemas/types.yaml#/definitions/flag description: Powering off the card is safe. cap-mmc-hw-reset: $ref: /schemas/types.yaml#/definitions/flag description: eMMC hardware reset is supported cap-sdio-irq: $ref: /schemas/types.yaml#/definitions/flag description: enable SDIO IRQ signalling on this interface full-pwr-cycle: $ref: /schemas/types.yaml#/definitions/flag description: Full power cycle of the card is supported. full-pwr-cycle-in-suspend: $ref: /schemas/types.yaml#/definitions/flag description: Full power cycle of the card in suspend is supported. mmc-ddr-1_2v: $ref: /schemas/types.yaml#/definitions/flag description: eMMC high-speed DDR mode (1.2V I/O) is supported. mmc-ddr-1_8v: $ref: /schemas/types.yaml#/definitions/flag description: eMMC high-speed DDR mode (1.8V I/O) is supported. mmc-ddr-3_3v: $ref: /schemas/types.yaml#/definitions/flag description: eMMC high-speed DDR mode (3.3V I/O) is supported. mmc-hs200-1_2v: $ref: /schemas/types.yaml#/definitions/flag description: eMMC HS200 mode (1.2V I/O) is supported. mmc-hs200-1_8v: $ref: /schemas/types.yaml#/definitions/flag description: eMMC HS200 mode (1.8V I/O) is supported. mmc-hs400-1_2v: $ref: /schemas/types.yaml#/definitions/flag description: eMMC HS400 mode (1.2V I/O) is supported. mmc-hs400-1_8v: $ref: /schemas/types.yaml#/definitions/flag description: eMMC HS400 mode (1.8V I/O) is supported. mmc-hs400-enhanced-strobe: $ref: /schemas/types.yaml#/definitions/flag description: eMMC HS400 enhanced strobe mode is supported no-mmc-hs400: $ref: /schemas/types.yaml#/definitions/flag description: All eMMC HS400 modes are not supported. dsr: description: Value the card Driver Stage Register (DSR) should be programmed with. $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 0xffff no-sdio: $ref: /schemas/types.yaml#/definitions/flag description: Controller is limited to send SDIO commands during initialization. no-sd: $ref: /schemas/types.yaml#/definitions/flag description: Controller is limited to send SD commands during initialization. no-mmc: $ref: /schemas/types.yaml#/definitions/flag description: Controller is limited to send MMC commands during initialization. fixed-emmc-driver-type: description: For non-removable eMMC, enforce this driver type. The value is the driver type as specified in the eMMC specification (table 206 in spec version 5.1) $ref: /schemas/types.yaml#/definitions/uint32 minimum: 0 maximum: 4 post-power-on-delay-ms: description: It was invented for MMC pwrseq-simple which could be referred to mmc-pwrseq-simple.yaml. But now it\'s reused as a tunable delay waiting for I/O signalling and card power supply to be stable, regardless of whether pwrseq-simple is used. Default to 10ms if no available. default: 10 supports-cqe: $ref: /schemas/types.yaml#/definitions/flag description: The presence of this property indicates that the corresponding MMC host controller supports HW command queue feature. disable-cqe-dcmd: $ref: /schemas/types.yaml#/definitions/flag description: The presence of this property indicates that the MMC controller\'s command queue engine (CQE) does not support direct commands (DCMDs). keep-power-in-suspend: $ref: /schemas/types.yaml#/definitions/flag description: SDIO only. Preserves card power during a suspend/resume cycle. wakeup-source: $ref: /schemas/types.yaml#/definitions/flag description: SDIO only. Enables wake up of host system on SDIO IRQ assertion. vmmc-supply: description: Supply for the card power vqmmc-supply: description: Supply for the bus IO line power, such as a level shifter. If the level shifter is controlled by a GPIO line, this shall be modeled as a "regulator-fixed" with a GPIO line for switching the level shifter on/off. mmc-pwrseq: $ref: /schemas/types.yaml#/definitions/phandle description: System-on-Chip designs may specify a specific MMC power sequence. To successfully detect an (e)MMC/SD/SDIO card, that power sequence must be maintained while initializing the card. patternProperties: "^.*@[0-9]+$": type: object description: | On embedded systems the cards connected to a host may need additional properties. These can be specified in subnodes to the host controller node. The subnodes are identified by the standard \'reg\' property. Which information exactly can be specified depends on the bindings for the SDIO function driver for the subnode, as specified by the compatible string. properties: compatible: description: | Name of SDIO function following generic names recommended practice reg: items: - minimum: 0 maximum: 7 description: Must contain the SDIO function number of the function this subnode describes. A value of 0 denotes the memory SD function, values from 1 to 7 denote the SDIO functions. required: - reg "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$": $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 2 maxItems: 2 items: minimum: 0 maximum: 359 description: Set the clock (phase) delays which are to be configured in the controller while switching to particular speed mode. These values are in pair of degrees. dependencies: cd-debounce-delay-ms: [ cd-gpios ] fixed-emmc-driver-type: [ non-removable ] additionalProperties: true examples: - | mmc3: mmc@1c12000 { #address-cells = <1>; #size-cells = <0>; reg = <0x1c12000 0x200>; pinctrl-names = "default"; pinctrl-0 = <&mmc3_pins_a>; vmmc-supply = <®_vmmc3>; bus-width = <4>; non-removable; mmc-pwrseq = <&sdhci0_pwrseq>; brcmf: wifi@1 { reg = <1>; compatible = "brcm,bcm4329-fmac"; interrupt-parent = <&pio>; interrupts = <10 8>; interrupt-names = "host-wake"; }; }; |