Based on kernel version 7.0. Page generated on 2026-04-23 09:48 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/mtd/mxic,multi-itfc-v009-nand-controller.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Macronix Raw NAND Controller maintainers: - Mason Yang <masonccyang@mxic.com.tw> description: The Macronix Multi-Interface Raw NAND Controller is a versatile flash memory controller for embedding in SoCs, capable of interfacing with various NAND devices. It requires dedicated clock inputs for core, data transmit, and delayed transmit paths along with register space and an interrupt line for operation. allOf: - $ref: nand-controller.yaml# properties: compatible: const: mxic,multi-itfc-v009-nand-controller reg: maxItems: 1 interrupts: maxItems: 1 "#address-cells": const: 1 "#size-cells": const: 0 clocks: minItems: 3 maxItems: 3 clock-names: items: - const: ps - const: send - const: send_dly required: - compatible - reg - interrupts - "#address-cells" - "#size-cells" - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> nand-controller@43c30000 { compatible = "mxic,multi-itfc-v009-nand-controller"; reg = <0x43c30000 0x10000>; #address-cells = <1>; #size-cells = <0>; interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>; clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; clock-names = "ps", "send", "send_dly"; nand@0 { reg = <0>; nand-ecc-mode = "soft"; nand-ecc-algo = "bch"; }; }; ... |