Based on kernel version 6.13
. Page generated on 2025-01-21 08:20 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 | Freescale Localbus UPM programmed to work with NAND flash Required properties: - compatible : "fsl,upm-nand". - reg : should specify localbus chip select and size used for the chip. - fsl,upm-addr-offset : UPM pattern offset for the address latch. - fsl,upm-cmd-offset : UPM pattern offset for the command latch. Optional properties: - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support. The corresponding address lines are used to select the chip. - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins (R/B#). For multi-chip devices, "n" GPIO definitions are required according to the number of chips. Deprecated properties: - fsl,upm-wait-flags : add chip-dependent short delays after running the UPM pattern (0x1), after writing a data byte (0x2) or after writing out a buffer (0x4). - chip-delay : chip dependent delay for transferring data from array to read registers (tR). Required if property "gpios" is not used (R/B# pins not connected). Each flash chip described may optionally contain additional sub-nodes describing partitions of the address space. See mtd.yaml for more detail. Examples: upm@1,0 { compatible = "fsl,upm-nand"; reg = <1 0 1>; fsl,upm-addr-offset = <16>; fsl,upm-cmd-offset = <8>; gpios = <&qe_pio_e 18 0>; flash { #address-cells = <1>; #size-cells = <1>; compatible = "..."; partition@0 { ... }; }; }; upm@3,0 { #address-cells = <0>; #size-cells = <0>; compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; reg = <3 0x0 0x800>; fsl,upm-addr-offset = <0x10>; fsl,upm-cmd-offset = <0x08>; /* Multi-chip NAND device */ fsl,upm-addr-line-cs-offsets = <0x0 0x200>; nand@0 { #address-cells = <1>; #size-cells = <1>; partition@0 { label = "fs"; reg = <0x00000000 0x10000000>; }; }; }; |