Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mtd/mxicy,nand-ecc-engine.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Macronix NAND ECC engine maintainers: - Miquel Raynal <miquel.raynal@bootlin.com> properties: compatible: const: mxicy,nand-ecc-engine-rev3 reg: maxItems: 1 clocks: maxItems: 1 interrupts: maxItems: 1 required: - compatible - reg additionalProperties: false examples: - | /* External configuration */ spi_controller0: spi@43c30000 { compatible = "mxicy,mx25f0a-spi"; reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; reg-names = "regs", "dirmap"; clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; clock-names = "send_clk", "send_dly_clk", "ps_clk"; #address-cells = <1>; #size-cells = <0>; flash@0 { compatible = "spi-nand"; reg = <0>; nand-ecc-engine = <&ecc_engine0>; }; }; ecc_engine0: ecc@43c40000 { compatible = "mxicy,nand-ecc-engine-rev3"; reg = <0x43c40000 0x10000>; }; - | /* Pipelined configuration */ spi_controller1: spi@43c30000 { compatible = "mxicy,mx25f0a-spi"; reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>; reg-names = "regs", "dirmap"; clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>; clock-names = "send_clk", "send_dly_clk", "ps_clk"; #address-cells = <1>; #size-cells = <0>; nand-ecc-engine = <&ecc_engine1>; flash@0 { compatible = "spi-nand"; reg = <0>; nand-ecc-engine = <&spi_controller1>; }; }; ecc_engine1: ecc@43c40000 { compatible = "mxicy,nand-ecc-engine-rev3"; reg = <0x43c40000 0x10000>; }; |