Based on kernel version 6.14
. Page generated on 2025-04-02 08:20 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mtd/nuvoton,ma35d1-nand.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Nuvoton MA35D1 NAND Flash Interface (NFI) Controller maintainers: - Hui-Ping Chen <hpchen0nvt@gmail.com> allOf: - $ref: nand-controller.yaml# properties: compatible: enum: - nuvoton,ma35d1-nand-controller reg: maxItems: 1 interrupts: maxItems: 1 clocks: maxItems: 1 patternProperties: "^nand@[a-f0-9]$": type: object $ref: raw-nand-chip.yaml properties: reg: minimum: 0 maximum: 1 nand-ecc-step-size: enum: [512, 1024] nand-ecc-strength: enum: [8, 12, 24] required: - reg unevaluatedProperties: false required: - compatible - reg - interrupts - clocks unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/nuvoton,ma35d1-clk.h> soc { #address-cells = <2>; #size-cells = <2>; nand-controller@401A0000 { compatible = "nuvoton,ma35d1-nand-controller"; reg = <0x0 0x401A0000 0x0 0x1000>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk NAND_GATE>; #address-cells = <1>; #size-cells = <0>; nand@0 { reg = <0>; nand-on-flash-bbt; nand-ecc-step-size = <512>; nand-ecc-strength = <8>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; uboot@0 { label = "nand-uboot"; read-only; reg = <0x0 0x300000>; }; }; }; }; }; ... |