Documentation / devicetree / bindings / mtd / intel,lgm-ebunand.yaml


Based on kernel version 6.11. Page generated on 2024-09-24 08:21 EST.

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/intel,lgm-ebunand.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Intel LGM SoC NAND Controller

allOf:
  - $ref: nand-controller.yaml

maintainers:
  - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>

properties:
  compatible:
    const: intel,lgm-ebunand

  reg:
    maxItems: 6

  reg-names:
    items:
      - const: ebunand
      - const: hsnand
      - const: nand_cs0
      - const: nand_cs1
      - const: addr_sel0
      - const: addr_sel1

  clocks:
    maxItems: 1

  dmas:
    maxItems: 2

  dma-names:
    items:
      - const: tx
      - const: rx

patternProperties:
  "^nand@[a-f0-9]$":
    type: object
    $ref: raw-nand-chip.yaml
    properties:
      reg:
        minimum: 0
        maximum: 1

      nand-ecc-algo:
        const: hw

    unevaluatedProperties: false

required:
  - compatible
  - reg
  - reg-names
  - clocks
  - dmas
  - dma-names

unevaluatedProperties: false

examples:
  - |
    nand-controller@e0f00000 {
        compatible = "intel,lgm-ebunand";
        reg = <0xe0f00000 0x100>,
              <0xe1000000 0x300>,
              <0xe1400000 0x8000>,
              <0xe1c00000 0x1000>,
              <0x17400000 0x4>,
              <0x17c00000 0x4>;
        reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",
                    "addr_sel0", "addr_sel1";
        clocks = <&cgu0 125>;
        dmas = <&dma0 8>, <&dma0 9>;
        dma-names = "tx", "rx";
        #address-cells = <1>;
        #size-cells = <0>;
 
        nand@0 {
            reg = <0>;
            nand-ecc-mode = "hw";
        };
    };

...