Based on kernel version 7.2. Page generated on 2026-08-20 08:41 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/dma/loongson,ls2k0300-dma.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Loongson-2 Multi-Channel DMA controller description: The Loongson-2 Multi-Channel DMA controller is used for transferring data between system memory and the peripherals on the APB bus. maintainers: - Binbin Zhou <zhoubinbin@loongson.cn> allOf: - $ref: dma-controller.yaml# properties: compatible: enum: - loongson,ls2k0300-dma - loongson,ls2k3000-dma reg: maxItems: 1 interrupts: description: Should contain all of the per-channel DMA interrupts in ascending order with respect to the DMA channel index. minItems: 4 maxItems: 8 clocks: maxItems: 1 '#dma-cells': const: 2 description: | DMA request from clients consists of 2 cells: 1. Channel index 2. Transfer request factor number, If no transfer factor, use 0. The number is SoC-specific, and this should be specified with relation to the device to use the DMA controller. dma-channels: enum: [4, 8] required: - compatible - reg - interrupts - clocks - '#dma-cells' - dma-channels unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/loongson,ls2k-clk.h> dma-controller@1612c000 { compatible = "loongson,ls2k0300-dma"; reg = <0x1612c000 0xff>; interrupt-parent = <&liointc0>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH>, <24 IRQ_TYPE_LEVEL_HIGH>, <25 IRQ_TYPE_LEVEL_HIGH>, <26 IRQ_TYPE_LEVEL_HIGH>, <27 IRQ_TYPE_LEVEL_HIGH>, <28 IRQ_TYPE_LEVEL_HIGH>, <29 IRQ_TYPE_LEVEL_HIGH>, <30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk LS2K0300_CLK_APB_GATE>; #dma-cells = <2>; dma-channels = <8>; }; ... |