Documentation / devicetree / bindings / dma / marvell,orion-xor.yaml


Based on kernel version 6.17. Page generated on 2025-10-03 10:04 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/marvell,orion-xor.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Marvell XOR engine

maintainers:
  - Andrew Lunn <andrew@lunn.ch>
  - Gregory Clement <gregory.clement@bootlin.com>

properties:
  compatible:
    oneOf:
      - items:
          - const: marvell,armada-380-xor
          - const: marvell,orion-xor
      - enum:
          - marvell,armada-3700-xor
          - marvell,orion-xor

  reg:
    items:
      - description: Low registers for the XOR engine
      - description: High registers for the XOR engine

  clocks:
    maxItems: 1

patternProperties:
  "^(channel|xor)[0-9]+$":
    description: XOR channel sub-node
    type: object
    additionalProperties: false

    properties:
      interrupts:
        description: Interrupt specifier for the XOR channel
        items:
          - description: Interrupt for this channel

      dmacap,memcpy:
        type: boolean
        deprecated: true
        description:
          Indicates that the XOR channel is capable of memcpy operations

      dmacap,memset:
        type: boolean
        deprecated: true
        description:
          Indicates that the XOR channel is capable of memset operations

      dmacap,xor:
        type: boolean
        deprecated: true
        description:
          Indicates that the XOR channel is capable of xor operations

    required:
      - interrupts

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    xor@d0060900 {
        compatible = "marvell,orion-xor";
        reg = <0xd0060900 0x100>,
              <0xd0060b00 0x100>;
        clocks = <&coreclk 0>;
 
        xor00 {
            interrupts = <51>;
        };
        xor01 {
            interrupts = <52>;
        };
    };