Documentation / devicetree / bindings / dma / fsl,elo3-dma.yaml


Based on kernel version 6.15. Page generated on 2025-05-29 09:08 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale Elo3 DMA Controller

maintainers:
  - J. Neuschäfer <j.ne@posteo.net>

description:
  DMA controller which has same function as EloPlus except that Elo3 has 8
  channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
  series chips, such as t1040, t4240, b4860.

properties:
  compatible:
    const: fsl,elo3-dma

  reg:
    items:
      - description:
          DMA General Status Registers starting from DGSR0, for channel 1~4
      - description:
          DMA General Status Registers starting from DGSR1, for channel 5~8

  ranges: true
 
  "#address-cells":
    const: 1
 
  "#size-cells":
    const: 1

  interrupts:
    maxItems: 1

patternProperties:
  "^dma-channel@[0-9a-f]+$":
    type: object
    additionalProperties: false

    properties:
      compatible:
        enum:
          # native DMA channel
          - fsl,eloplus-dma-channel
 
          # audio DMA channel, see fsl,ssi.yaml
          - fsl,ssi-dma-channel

      reg:
        maxItems: 1

      interrupts:
        maxItems: 1
        description:
          Per-channel interrupt. Only necessary if no controller interrupt has
          been provided.

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
 
    dma@100300 {
        compatible = "fsl,elo3-dma";
        reg = <0x100300 0x4>,
              <0x100600 0x4>;
        #address-cells = <1>;
        #size-cells = <1>;
        ranges = <0x0 0x100100 0x500>;
 
        dma-channel@0 {
            compatible = "fsl,eloplus-dma-channel";
            reg = <0x0 0x80>;
            interrupts = <28 IRQ_TYPE_EDGE_FALLING 0 0>;
        };
 
        dma-channel@80 {
            compatible = "fsl,eloplus-dma-channel";
            reg = <0x80 0x80>;
            interrupts = <29 IRQ_TYPE_EDGE_FALLING 0 0>;
        };
 
        dma-channel@100 {
            compatible = "fsl,eloplus-dma-channel";
            reg = <0x100 0x80>;
            interrupts = <30 IRQ_TYPE_EDGE_FALLING 0 0>;
        };
 
        dma-channel@180 {
            compatible = "fsl,eloplus-dma-channel";
            reg = <0x180 0x80>;
            interrupts = <31 IRQ_TYPE_EDGE_FALLING 0 0>;
        };
 
        dma-channel@300 {
            compatible = "fsl,eloplus-dma-channel";
            reg = <0x300 0x80>;
            interrupts = <76 IRQ_TYPE_EDGE_FALLING 0 0>;
        };
 
        dma-channel@380 {
            compatible = "fsl,eloplus-dma-channel";
            reg = <0x380 0x80>;
            interrupts = <77 IRQ_TYPE_EDGE_FALLING 0 0>;
        };
 
        dma-channel@400 {
            compatible = "fsl,eloplus-dma-channel";
            reg = <0x400 0x80>;
            interrupts = <78 IRQ_TYPE_EDGE_FALLING 0 0>;
        };
 
        dma-channel@480 {
            compatible = "fsl,eloplus-dma-channel";
            reg = <0x480 0x80>;
            interrupts = <79 IRQ_TYPE_EDGE_FALLING 0 0>;
        };
    };

...