Based on kernel version 6.19. Page generated on 2026-02-12 08:38 EST.
| 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/dma/apm,xgene-storm-dma.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: APM X-Gene Storm SoC DMA maintainers: - Khuong Dinh <khuong@os.amperecomputing.com> properties: compatible: const: apm,xgene-storm-dma reg: items: - description: DMA control and status registers - description: Descriptor ring control and status registers - description: Descriptor ring command registers - description: SoC efuse registers interrupts: items: - description: DMA error reporting interrupt - description: DMA channel 0 completion interrupt - description: DMA channel 1 completion interrupt - description: DMA channel 2 completion interrupt - description: DMA channel 3 completion interrupt clocks: maxItems: 1 dma-coherent: true required: - compatible - reg - interrupts - clocks additionalProperties: false examples: - | dma@1f270000 { compatible = "apm,xgene-storm-dma"; reg = <0x1f270000 0x10000>, <0x1f200000 0x10000>, <0x1b000000 0x400000>, <0x1054a000 0x100>; interrupts = <0x0 0x82 0x4>, <0x0 0xb8 0x4>, <0x0 0xb9 0x4>, <0x0 0xba 0x4>, <0x0 0xbb 0x4>; dma-coherent; clocks = <&dmaclk 0>; }; |