Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip PolarFire Soc (MPFS) RTC allOf: - $ref: rtc.yaml# maintainers: - Daire McNamara <daire.mcnamara@microchip.com> - Lewis Hanly <lewis.hanly@microchip.com> properties: compatible: enum: - microchip,mpfs-rtc reg: maxItems: 1 interrupts: items: - description: | RTC_WAKEUP interrupt - description: | RTC_MATCH, asserted when the content of the Alarm register is equal to that of the RTC's count register. clocks: items: - description: | AHB clock - description: | Reference clock: divided by the prescaler to create a time-based strobe (typically 1 Hz) for the calendar counter. By default, the rtc on the PolarFire SoC shares it's reference with MTIMER so this will be a 1 MHz clock. clock-names: items: - const: rtc - const: rtcref required: - compatible - reg - interrupts - clocks - clock-names additionalProperties: false examples: - | #include "dt-bindings/clock/microchip,mpfs-clock.h" rtc@20124000 { compatible = "microchip,mpfs-rtc"; reg = <0x20124000 0x1000>; clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>; clock-names = "rtc", "rtcref"; interrupts = <80>, <81>; }; ... |