Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries %YAML 1.2 --- $id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel AT91 RTT allOf: - $ref: rtc.yaml# maintainers: - Alexandre Belloni <alexandre.belloni@bootlin.com> properties: compatible: oneOf: - items: - const: atmel,at91sam9260-rtt - items: - enum: - microchip,sam9x60-rtt - microchip,sam9x7-rtt - const: atmel,at91sam9260-rtt - items: - const: microchip,sama7g5-rtt - const: microchip,sam9x60-rtt - const: atmel,at91sam9260-rtt reg: maxItems: 1 interrupts: maxItems: 1 clocks: maxItems: 1 atmel,rtt-rtc-time-reg: $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - description: Phandle to the GPBR node. - description: Offset within the GPBR block. description: Should encode the GPBR register used to store the time base when the RTT is used as an RTC. The first cell should point to the GPBR node and the second one encodes the offset within the GPBR block (or in other words, the GPBR register used to store the time base). required: - compatible - reg - interrupts - clocks - atmel,rtt-rtc-time-reg unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> rtc@fffffd20 { compatible = "atmel,at91sam9260-rtt"; reg = <0xfffffd20 0x10>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&clk32k>; atmel,rtt-rtc-time-reg = <&gpbr 0x0>; }; |