Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/rtc/qcom-pm8xxx-rtc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm PM8xxx PMIC RTC device maintainers: - Satya Priya <quic_c_skakit@quicinc.com> properties: compatible: oneOf: - enum: - qcom,pm8058-rtc - qcom,pm8921-rtc - qcom,pm8941-rtc - qcom,pmk8350-rtc - items: - enum: - qcom,pm8018-rtc - const: qcom,pm8921-rtc reg: minItems: 1 maxItems: 2 reg-names: minItems: 1 items: - const: rtc - const: alarm interrupts: maxItems: 1 allow-set-time: $ref: /schemas/types.yaml#/definitions/flag description: Indicates that the setting of RTC time is allowed by the host CPU. nvmem-cells: items: - description: four-byte nvmem cell holding a little-endian offset from the Unix epoch representing the time when the RTC timer was last reset nvmem-cell-names: items: - const: offset wakeup-source: true required: - compatible - reg - interrupts additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/spmi/spmi.h> spmi { #address-cells = <2>; #size-cells = <0>; pmic@0 { compatible = "qcom,pm8941", "qcom,spmi-pmic"; reg = <0x0 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; rtc@6000 { compatible = "qcom,pm8941-rtc"; reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; nvmem-cells = <&rtc_offset>; nvmem-cell-names = "offset"; }; }; }; ... |