Based on kernel version 6.11
. Page generated on 2024-09-24 08:21 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/rtc/intersil,isl12022.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Intersil ISL12022 Real-time Clock maintainers: - Alexandre Belloni <alexandre.belloni@bootlin.com> properties: compatible: const: isil,isl12022 reg: maxItems: 1 interrupts: maxItems: 1 '#clock-cells': const: 0 isil,battery-trip-levels-microvolt: description: The battery voltages at which the first alarm and second alarm should trigger (normally ~85% and ~75% of nominal V_BAT). items: - enum: [2125000, 2295000, 2550000, 2805000, 3060000, 4250000, 4675000] - enum: [1875000, 2025000, 2250000, 2475000, 2700000, 3750000, 4125000] required: - compatible - reg allOf: - $ref: rtc.yaml# # If #clock-cells is present, interrupts must not be present - if: required: - '#clock-cells' then: properties: interrupts: false unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> i2c { #address-cells = <1>; #size-cells = <0>; rtc@6f { compatible = "isil,isl12022"; reg = <0x6f>; interrupts-extended = <&gpio1 5 IRQ_TYPE_LEVEL_LOW>; isil,battery-trip-levels-microvolt = <2550000>, <2250000>; }; }; ... |