Based on kernel version 6.11
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Hisilicon System Reset Controller maintainers: - Wei Xu <xuwei5@hisilicon.com> description: | Please also refer to reset.txt in this directory for common reset controller binding usage. The reset controller registers are part of the system-ctl block on hi3660 and hi3670 SoCs. properties: compatible: oneOf: - items: - const: hisilicon,hi3660-reset - items: - const: hisilicon,hi3670-reset - const: hisilicon,hi3660-reset hisi,rst-syscon: deprecated: true description: phandle of the reset's syscon, use hisilicon,rst-syscon instead $ref: /schemas/types.yaml#/definitions/phandle hisilicon,rst-syscon: description: phandle of the reset's syscon. $ref: /schemas/types.yaml#/definitions/phandle '#reset-cells': description: | Specifies the number of cells needed to encode a reset source. Cell #1 : offset of the reset assert control register from the syscon register base offset + 4: deassert control register offset + 8: status control register Cell #2 : bit position of the reset in the reset control register const: 2 required: - compatible additionalProperties: false examples: - | iomcu_rst_controller { compatible = "hisilicon,hi3660-reset"; hisilicon,rst-syscon = <&iomcu>; #reset-cells = <2>; }; ... |